In the field of semiconductor devices it is known to have a raised metallic bump called a bonding pad on that surface of the device which is to be bonded to another body of material. For instance, electroluminescent devices such as lasers can be fabricated to include a gold or gold alloy bonding pad from several thousand angstroms (.ANG.) to 10 micrometers (.mu.m) and more in thickness. A corresponding bonding pad or film on a heatsink or header facilitates the thermocompression bonding of the two bodies, a process which employs an appropriate combination of temperature, pressure and time to provide a flux-free, high integrity bond.
In electrolytically depositing bonding pads, a semiconductor wafer which will subsequently be separated into individual devices is masked so as to expose the bonding pad regions of each device, typically by photolithographic techniques. The bonding pad material, such as gold, can then be electroplated onto the bonding pad regions using a suitable anode (typically platinized titanium, or the like) and the semiconductor wafer as a cathode and a DC power supply. The mask is then removed from the wafer and the wafer separated into devices, each of which will have a gold bonding pad thereon.
Several problems exist, however, in the bonding pad deposition process described above. DC plating tends to produce a mushroom-shaped gold layer providing a distorted bonding pad. This is not satisfactory for themocompression bonding which requires a smooth, planar bonding pad for optimum results. Although it is known in the electroplating art to incorporate grain refining and planarizing additives into the electrolyte, these additives provide a harder, lower purity gold deposit. Stringent requirements for semiconductor devices dictate that the bond be of a high-purity gold and thermocompression bonding requires a more malleable, rather than a harder, gold layer.
Also DC plating provides bonding pads which introduce unwanted stress in the device. This is apparent when the devices are separated from the wafer. Defects and striations are evident on the cleaved facets of semiconductor devices which have DC plated pads. Not only are these facet defects undesirable, but the stress on the device can adversely affect its opto-electronic operation.
Finally, devices which are fabricated from non-planar substrates, such as the Constricted Double Heterojunction-Large Optical Cavity (CDH-LOC) laser described in U.S. Pat. No. 4,347,486 by Botez, present a heat transfer problem. DC plating is basically conformal which results in a plated layer or pad closely resembling the non-planar device onto which it was plated. Only over extreme thicknesses, which are far beyond the practical range for bonding pads, do the non-planarities smooth away. Again, additives to planarize the deposit provide a lower purity, harder bonding gold layer. In the Botez device, the non-planarity comprises a dimple having a depth of about 1 to 3 microns. When such a device is bonded to a heatsink, this dimple results in a void in the bond. This void eliminates heat transfer in that area, which is typically at or near the laser region where the heat buildup is the greatest. The resultant thermal resistant bonds represent a serious hindrance to reliable performance of these electroluminescent devices, particularly of the Botez device.
Therefore, an improved method of depositing bonding pads onto semiconductor devices, particularly non-planar semiconductor devices, has been sought.